10 Security Design Principle for your Computer

We have seen that security is guarding use’s data and programs against interface by entities external to a system like unauthorized person. Thus security designs provide need special emphasis.

In general, security measures include control and monitoring of physical access to the computer premises as well as the internal, computer system security. External or physical security includes the standard techniques of fencing, surveillance, authentication, and attendance monitoring. Additional access restriction may be imposed in special areas, such as the computer center and storage areas for backup volumes Physical security may also include measures for disaster recovery. Which often amount of replication of critical data and equipment at geographically dispersed locations to minimize exposure to the consequences of disasters such as fire or flood .Seltzer and Schroeder (1975) have identified the following general design principles for protection mechanisms.

1. Least privilege

 Every subject should use the least set of privileges necessary to complete its task. This principle limits the damage from Trojan horse attacks. It effectively advocates support for small protection domains and switching of domains when the access needs change.

2. Separation of privilege

When possible, access to objects should depend on satisfying more than one condition.

3.Least common mechanism

This approach advocates minimizing the amount of mechanism common to and depended upon by multiple users, Design implication, include the incorporation of techniques for separating users, such as logical separation via virtual machines and physical separation on different machines in distributed systems

4.Economy of mechanism

Keeping the design as simple as possible facilitates verification and correct implementations.

5.Complete mediation

Every access request for every object should be checked for authorization, the checking mechanism should be efficient because it has a profound influence on system performance.

6.Fall-safe default

Access rights should be acquired by explicit permission only, and the default should be back of access.

7.Open design

The design of the security mechanism should not be secret, and it should not depend on the ignorance of attackers, this implies the use o cryptographic system where the algorithms are known but the keys are secret.

8.User acceptability

The mechanism should provide case of use so that it is applied correctly and not circumvented by users.

9.User Friendlily

Computer System security mechanism include authentication, access control, flow control auditing and cryptography.

10. Other

To which the user is supposed to apply a secret transformation,such as squaring and incrementing the value.Failure to do so may be used to detect unauthorized users.

What is Computer Processor

Processors are now being built with even faster ratings. With all other parameters being equal (although they never are) a CPU operating at 500 MHz can process data five times as fast as one operating at 100 MHz

Types of Processors

CISC Processors

One of the earlier goals of CPU designers was to provide more and more instructions in the instruction set of a CPU, to ensure that the CPU directly supports more features, making it easier to translate high level language programs to machine language, and to ensure that the machine language programs run more effectively. Of course every additional instruction in the instruction set of a CPU requires the necessary hardware circuitry to handle that instruction, adding more complexity to the CPU’s hardware circuitry. Another goal of CPU designers was to optimize the usage of expensive memory. To achieve this, the designers tried to pack more instruction in memory, by introduction the concept of variable-length instructions such as half word, one and half word, etc.

For example and operand in an immediate instruction needs fewer bits, and can be designed as half word instruction. Additionally, CPU,s were designed to support a variety of addressing modes .CPUs with large instruction set, variable  length instructions and a variety of addressing modes are said to employ CISC(Complex instruction set computer) architectures, Since  CISC processors posses so many processing features, they make the job of machine language programmers easier. However they are complex and expensive to produce. Most personal computers of today use CISC processors.

RISC Processors

In early 1980;s Some CPU designers discovered that several of the instruction supported by a CISC-based CPU are rarely used. Hence they came out with an idea that the complexity of CPU design can be greatly reduced, by implementing only a bare minimum basic set of instructions, plus some of the more frequently used instructions in the hardware circuitry of the CPU. Other complex instructions need not to be supported in the instructions set of the CPU, because they can always be implemented in software, by using the basis set of instructions.

 While working on simpler CUP design. These designers also came up with the idea of making .All the instructions of uniform length, so that the decoding and execution of all instructions become simple fast. Furthermore, to speed up computation, and to reduce the complexity of handling a number of addressing modes, they decided to design all the instructions in such a way that they retrieve operands stored in registers in CPU, rather than from memory. These design ideas resulted in producing faster and less expensive processors. CPUs with a small instruction set, fixed-length instructions, and reduced reference to memory to retrieve operands, are said to employ RISC(Reduced Instruction Set Computers)architure, Since RISC processors have a small instruction set, they place extra demand on programmers, who must consider how to implement complex computations by combining simple instructions. However, due to simpler design, RISC processors are faster for most application, less complex and less expensive to produce than CISC processors.

EPIC Processors

The Explicitly Parallel Instruction Computing (EPIC) technology breaks through the sequential nature of conventional processor architectures, by allowing the software to communicate explicitly to the processor, when operations can be done in parallel. For this, it uses tighter coupling between the complier and the processor, and enables the compiler to extract maximum parallelism in the original code, and explicitly describe it to the processor. Processors based on EPIC architecture are simpler and more powerful than traditional CISC or RISC processors. These processors are mainly targeted to next-generation, 64-bit high-end server and workstation market (not for personal computer market).